Function core::arch::mips::__msa_fsueq_d [−][src]
This is supported on MIPS and target feature
msa
only.Expand description
Vector Floating-Point Signaling Compare Ordered
Set all bits to 1 in vector (two signed 64-bit integer numbers) elements
if the corresponding a
(two 64-bit floating point numbers) and
b
(two 64-bit floating point numbers) elements are unordered or equal,
otherwise set all bits to 0.