Function core::arch::mips64::__msa_srlri_h [−][src]
This is supported on MIPS-64 and target feature
msa
only.Expand description
Immediate Shift Right Logical Rounded
The elements in vector a
(eight signed 16-bit integer numbers)
are shifted right logical by imm6
bits.The most significant
discarded bit is added to the shifted value (for rounding) and
the result is written to vector (eight signed 16-bit integer numbers).